Rules for High Speed PCB Design

Rule analysis of some high-speed PCB designs
1. When designing the PCB layout, fully abide by the design principle of laying along the signal flow in a straight line, and try to avoid going back and forth.
Cause analysis: Avoid direct signal coupling, which will affect the signal quality.
2. If the PCB clock frequency exceeds 5MHZ or the signal rise time is less than 5ns, multi-layer board design is generally required.
Reason analysis: This is the “55 principle” in PCB design. The signal loop area can be well controlled by using multi-layer board design.
3. In the multi-layer board, the TOP and BOTTOM layers of the single board should not have signal lines greater than 50MHZ as far as possible.
Cause analysis: It is better to route the high-frequency signal between two plane layers to suppress its radiation to space.
4. On the PCB board, the filtering, protection and isolation devices of the interface circuit should be placed close to the interface.
Cause analysis: The effect of protection, filtering and isolation can be effectively realized.
5. If there are both filter and protection circuits at the interface, the principle of protection first and then filter should be followed.
Cause analysis: The protection circuit is used to suppress external overvoltage and overcurrent. If the protection circuit is placed after the filter circuit, the filter circuit will be damaged by overvoltage and overcurrent.
6. When laying out, ensure that the input and output lines of the filter circuit (filter), isolation and protection circuits are not coupled to each other.
Reason analysis: When the input and output lines of the above circuit are coupled with each other, the filtering, isolation or protection effect will be weakened.
7. For multi-layer boards, the key wiring layers (clock line, bus, interface signal line, radio frequency line, reset signal line, chip selection signal line and various control signal lines, etc.) should be adjacent to the complete ground plane, preferably between two ground planes.
Reason analysis: The key signal lines are generally strong radiation or extremely sensitive signal lines. Wiring close to the ground plane can reduce the area of the signal loop, reduce its radiation intensity or improve the anti-interference ability.
8. Key signal routing must not cross the partition area (including reference plane gaps caused by vias and pads).
Cause analysis: Routing across partitions will lead to an increase in the area of the signal loop.
9. The key signal line is ≥3H from the edge of the reference plane (H is the height of the line from the reference plane).
Cause analysis: Suppress the edge radiation effect.
10. When there are high, medium and low speed circuits on the circuit board at the same time, the high and medium speed circuits should be kept away from the interface.
Cause analysis: Avoid high-frequency circuit noise radiating outward through the interface.
Knowledge expansion: what is “high-speed signal”
What is a high-speed signal? How to judge the high-speed signal? Cadence company defines this:
1) Any signal greater than 50MHz is a high-speed signal.
2) Whether the signal is high-speed is not directly related to the frequency, but when the rising/falling edge of the signal is less than 50ps, it is considered a high-speed signal.
3) When the length of the transmission path where the signal is located is greater than 1/6λ, the signal is considered to be a high-speed signal.
4) When the signal is transmitted along the transmission path and severe skin effect and ionization loss occur, it is considered to be a high-speed signal.

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