Impedance matching means that when energy is transmitted, the load impedance is required to be equal to the characteristic impedance of the transmission line. At this time, the transmission will not produce reflection, which means that all energy is absorbed by the load. On the contrary, there is energy loss in transmission. In high-speed PCB design, the matching of impedance is related to the quality of the signal.
When do PCB traces need impedance matching?
It does not mainly depend on the frequency, but the key is to look at the steepness of the edge of the signal, that is, the rise/fall time of the signal. It is generally believed that if the rise/fall time of the signal (calculated by 10% to 90%) is less than 6 times the wire delay, it is high speed. Signal, must pay attention to the problem of impedance matching. The wire delay is generally set at 150ps/inch.
During the propagation of the signal along the transmission line, if the transmission line has a consistent signal propagation speed everywhere, and the capacitance per unit length is the same, then the signal always sees a completely consistent instantaneous impedance during the propagation process. Since the impedance remains constant throughout the transmission line, we give a specific name to represent this feature or characteristic of a specific transmission line, which is called the characteristic impedance of the transmission line. The characteristic impedance refers to the value of the instantaneous impedance seen by the signal when the signal propagates along the transmission line. The characteristic impedance is related to factors such as the layer where the PCB wire is located, the material (dielectric constant) used in the PCB, the width of the trace, the distance between the wire and the plane, and has nothing to do with the length of the trace. The characteristic impedance can be calculated using software. In high-speed PCB wiring, the trace impedance of digital signals is generally designed to be 50 ohms, which is an approximate figure. It is generally stipulated that the coaxial cable baseband is 50 ohms, the frequency band is 75 ohms, and the twisted pair (differential) is 100 ohms.
Common Impedance Matching Methods
1. Serial terminal matching
Under the condition that the source end impedance of the signal is lower than the characteristic impedance of the transmission line, a resistor R is connected in series between the source end of the signal and the transmission line, so that the output impedance of the source end matches the characteristic impedance of the transmission line, and the signal reflected from the load end is suppressed A re-reflection occurs.
Matching resistor selection principle: The sum of the matching resistor value and the output impedance of the driver is equal to the characteristic impedance of the transmission line. The output impedance of common CMOS and TTL drivers will vary with the level of the signal. Therefore, for TTL or CMOS circuits, it is impossible to have a very correct matching resistance, and only a compromise can be considered. The signal network of the chain topology is not suitable for series termination, and all loads must be connected to the end of the transmission line.
Tandem matching is the most common method of termination matching. Its advantage is that it consumes less power, does not bring additional DC load to the driver, does not introduce additional impedance between the signal and ground, and requires only one resistive element. Common applications: Impedance matching of general CMOS and TTL circuits. The USB signal is also sampled in this way for impedance matching.
2. Parallel terminal matching
When the impedance of the signal source end is very small, the input impedance of the load end can be matched with the characteristic impedance of the transmission line by adding a parallel resistance to eliminate the reflection of the load end. There are two forms of implementation: single resistor and double resistor.
Matching resistance selection principle: When the input impedance of the chip is very high, for the single resistance form, the parallel resistance value at the load end must be similar or equal to the characteristic impedance of the transmission line; for the double resistance form, each parallel resistance value Twice the characteristic impedance of the transmission line.
The advantage of parallel terminal matching is that it is simple and easy to implement. The obvious disadvantage is that it will cause DC power consumption: the DC power consumption of the single-resistor mode is closely related to the duty cycle of the signal; Both have DC power consumption, but the current is half that of the single-resistor approach.
Common applications: more high-speed signal applications.
(1) DDR, DDR2 and other SSTL drivers. In the form of a single resistor, it is connected in parallel to VTT (usually half of IOVDD). The parallel matching resistance of the DDR2 data signal is built in the chip.
(2) High-speed serial data interfaces such as TMDS. It adopts the form of a single resistor, which is connected in parallel to IOVDD at the receiving device end, and the single-ended impedance is 50 ohms (100 ohms between differential pairs).