In high-speed PCB design, multi-layer PCBs are often required, and vias are an important factor in multi-layer PCB design. Today, I will learn about through-hole design in high-speed PCB with everyone.
Impact of vias in high-speed PCBs
In high-speed PCB multilayer boards, when signals are transmitted from one layer of interconnection to another layer of interconnection, they need to be connected through vias. When the frequency is lower than 1GHz, the via hole can play a very good connection role, and its parasitic capacitance and inductance can be ignored.
When the frequency is higher than 1GHz, the impact of via parasitics on signal integrity cannot be ignored. At this time, the via hole appears as a discontinuous impedance breakpoint on the transmission path, causing signal integrity problems such as signal reflection, delay, and attenuation.
When the signal is transmitted to another layer through the via, the reference layer of the signal line is also used as the return path of the via signal, and the return current will flow between the reference layers through capacitive coupling, causing problems such as ground elasticity.
Via type:
Vias are generally divided into three categories: through holes, blind holes, and buried holes.
Blind hole: located on the upper and lower surfaces of the printed circuit board, with a certain depth. Used to connect surface circuits with underlying internal circuits. The depth of the hole and the diameter of the hole usually do not exceed a certain ratio.
Buried hole: refers to the connection hole located in the inner layer of the printed circuit board, which does not extend to the surface of the circuit board.
Through hole: This hole runs through the entire circuit board and can be used for internal interconnection or as a component mounting positioning hole. Because through holes are easier and less expensive to implement during manufacturing, they are often used on printed circuit boards.
through parasitic capacitance:
The via itself has parasitic capacitance to ground. If the diameter of the ground layer via isolation hole is D2, the diameter of the via pad is D1, the thickness of the PCB is T, and the dielectric constant of the substrate is ε, then the parasitic capacitance is approximately:
C =1.41εTD1/(D2-D1)
The parasitic capacitance of the via mainly affects the circuit by prolonging the rise time of the signal and reducing the speed of the circuit. The smaller the capacitance, the smaller the effect.
